1. Field of Invention
The present invention relates to a process for fabricating an integrated circuit. More particularly, the present invention relates to a shallow trench isolation process.
2. Description of Related Art
Shallow trench isolation is a technique applicable for fabricating isolation devices in many different very large semiconductor integration (VLSI) circuits. Trenches are formed between the metal-oxide-semiconductor (MOS) devices over a substrate of an integration circuit. The trenches are then filled with insulation material for electrically isolating those devices.
FIGS. 1A-1F are schematic, cross-sectional views of a conventional shallow trench isolation (STI) process.
Referring to FIG. 1A, a pad oxide layer 102 is grown over a substrate 100. A silicon nitride layer 104 is formed over the pad oxide layer 102.
Referring to FIG. 1B, the silicon nitride layer 104, the pad oxide layer 102, and the substrate 100 are patterned, and thus a trench 106 is formed in the substrate 100. The trench 106 has a top corner 106a.
Still referring to FIG. 1B, a liner oxide layer 108 is conformally formed over the trench 106.
Referring to FIG. 1C, an oxide layer (not shown) is formed over the silicon nitride layer 104 and the substrate 100, and thus the trench 106 (shown in FIG. 1B) is filled with the oxide layer. The oxide layer over the silicon nitride layer 104 is partially removed by chemical-mechanical polishing. Being partially removed, the remaining oxide layer is represented by reference numeral 110.
Referring to FIG. 1D, the silicon nitride layer 104 (shown in FIG. 1C) and the pad oxide layer 102 (shown in FIG. 1C) are stripped by wet etching, and the oxide layer 110 thus has an exposed sidewall 110a. After this removing step, another wet etching step is performed to fabricate devices (not shown) over the substrate 100. In those wet etching steps, the etching recipes used often erode the exposed sidewall 110a of the oxide layer 110, and thus a hollow 112 in the oxide layer 110 is formed near the top corner 106a of the trench 106. A conductive layer (not shown) is then deposited over the oxide layer 110 and the substrate 100, but the conductive layer causes shorts through the hollow 112 between devices (not shown) subsequently formed over the substrate 100. Moreover, the top corner 106a of the trench 106, exposed when the hollow 112 is formed, greatly affects the devices over the substrate 100 greatly. This effect, known as the kink effect, is a process problem needs to be solved.